1. Field of the Invention
The present invention relates to a structure of a capacitor circuit and particularly to a structure of a capacitor circuit which makes it possible to remove stray capacitance of the capacitor circuit.
2. Description of the Prior Art
FIG. 2 is a sectional view showing an example of a conventional structure of a capacitor circuit for distributing input electric charge in a binary manner. First, this structure will be described. Referring to FIG. 2, a first insulating film 51 is formed on a conductor or semiconductor substrate 50 and first electrodes 1, 3, 5, 7, 9, 11 and 13 are formed with spacings on the first insulating film 51. A second insulating film 52 is formed on the first insulating film 51 and the first electrodes 1, 3, 5, 7, 9, 11 and 13 and then second electrodes 2, 4, 6, 8, 10, 12 and 14 are formed with spacings on the second insulating film 52. A capacitor 101 is formed by the substrate 50, the first insulating film 51, the first electrode 1, the second insulating film 52 and the second electrode 2; a capacitor 102 is formed by the substrate 50, the first insulating film 51, the first electrode 3, the second insulating film 52 and the second electrode 4; and subsequently capacitors 103, 104, 105, 106 and 107 are formed in the same manner. The second electrode 2 of the capacitor 101 and the first electrode 3 of the capacitor 102 are connected by a connection portion 15; the second electrode 4 of the capacitor 102 and the second electrode 16 of the capacitor 103 are connected by a connection portion 6; and other electrodes are connected by connection portions 17, 18, 19 and 20 in the same manner, respectively. The area of each of the first electrodes 3, 7, 11 and 13 and the second electrodes 4, 8, 12 and 14 of the capacitors 102, 104, 106 and 107, respectively, is twice as large as the area of each of the first electrodes 1, 5 and 9 and the second electrodes 2, 6 and 10 of the capacitors 101, 103 and 105, respectively, so that input electric charge may be distributed in a binary manner. Thus, assuming that the capacitance of each of the capacitors 101, 103 and 105 is C, the capacitance of each of the capacitors 102, 104, 106 and 107 is 2C.
FIG. 3 is an equivalent circuit diagram of the circuit shown in FIG. 2. Referring to FIG. 3, the reference numeral 15 indicates a node between the second electrode 2 and the first electrode 3; the reference numeral 17 indicates a node among the second electrode 4, the second electrode 6 and the first electrode 7; the reference numeral 19 indicates a node among the second electrode 8, the second electrode 10 and the first electrode 11; and the reference numeral 20 indicates a node between the second electrode 12 and the second electrode 14.
The operation of the above stated circuit will be described in the following with reference to FIG. 3. If there is no stray capacitance at the nodes 15, 17, 19 and 20, the capacitance as viewed to the right side from each of the nodes 15, 17 and 20 is equal to C. More specifically, when an input charge Q is applied to the node 15, the capacitance as viewed to the right side from the node 15 is C and electric charge of Q/2 is applied to each of the capacitors 101 and 102. In the same manner, the capcacitance as viewed to the right side from the node 17 is C and electric charge of Q/4 is applied to each of the capacitors 103 and 104; the capacitance as viewed to the right side from the node 19 is C and electric charge of Q/8 is applied to each of the capacitors 105, 106 and 107; and thus the input electric charge is distributed in a binary manner.
However, in such a conventional electric charge distributing circuit, a stray capacitance actually exists between each of the first electrodes 1, 3, 5, 7, 9, 11, and 13 and the substrate 50. More specifically, stray capacitances exist at the nodes 15, 17, 19 and 20 shown in FIG. 3 and, as a result, the capacitance as viewed to the right side from each of the nodes 15, 17 and 19 can not be made to be exactly C, causing decrease in the precision of electric charge distribution.
The present invention has been accomplished to overcome the above described disadvantages and it is an object of the present invention to provide a structure of a capacitor circuit which can attain a high precision of electric charge distribution.